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RTSim Accelerator  [DT-1020]
The DT-1020 is an accelerator for speeding up the LT-RTSim. The addition of this accelerator enables simulations at intervals of 0.1〜10 µsec.
 
Overview
The DT-1020 is an accelerator for speeding up the LT-RTSim. The LT-RTSim runs simulations at intervals of several 10 µsec at best, but the addition of this accelerator enables simulations at intervals of 0.1 ? 10 µsec.
In general, simulation models are composed of diverse elements (size and speed of the model) from large models that move comparatively slowly to comparatively small models that move extremely fast. The most important issue here is how to move the comparatively small models that move at extremely high speeds. 
Since realtime simulators have a limited processing capacity, processing for individual model parts is assigned according to step size so that each part can attain its required processing speed; slow and intermediate speed parts of the model are assigned to the LT-RTSim-II (Pentium M) and fast and super-fast parts are allotted to the accelerator (SH-4A and FPGA). 
DSP Technology also customizes the software development environment to the hardware configuration.
 

 

Step size

Hardware

Device 

Development environment 

Block library 

Low〜Intermediate speed 

〜few 10µ

LT-RTSim-II

Pentium M

LT-RTSim-View

Standard

High speed

1µ〜10µ

Accelerator

SH-4A

LT-RTSim-View

DT-1020EX Lib

Ultra-high speed

0.1µ〜1µ

Accelerator

FPGA

LT-RTSim-View

DT-1020EX Lib

Table 1 Simulation intervals
 
The accelerator mounts a CPU and FPGA as the computing devices.
It balances flexibility (CPU) with high speed (FPGA) to produce realtime simulation models. 
An SH-4A (400 MHz) with an internal 64-bit floating-point arithmetic unit is used as the CPU and is capable of processing Simulink models at high speed and in realtime. 
Moreover, in order to perform operations at higher speeds than seen with CPU processing, an EP2S60 is incorporated as an FPGA and it can perform input/output and modeling calculations at super fast speeds.
This accelerator is ideal for developing rapid prototype controllers that require high speed response, as well as HILS for control targets.
 
Features
(1) An SH-4A is incorporated as the CPU. Clock: 400 MHz
(2) A 128 Mbyte DDR-SRAM is mounted as the CPU memory.
(3) Accelerator DI/O consists of 16-bit TTL inputs and 16-bit TTL outputs.
(4) A 53-point TTL expansion bus is available for interfacing with daughter boards.
(5) The system can be expanded up to 16 DT-1020s.
(6) LVDS communications are used between DT-1020s.
(7) External I/O buses use LVDS of 11 input channels and 11 output channels, and are capable of a transmission rate of 13.2 bps.
(8) External I/O buses can be connected in a daisy chain of up to 8 I/O devices.
(9) I/O access from the CPU is done in 0.1 µsec.
(10) Writing in the PGA flash memory can be done via a PCI bus.
(11) CPU programs and data can be written in flash memories via PCI buses.
(12) An A/D and D/A unit (DT-1021) is available for external I/O. The system can be expanded up to 8 units.
(13) The RTSim-View software development environment was functionally expanded so as to incorporate Simulink models into the CPU (SH-4A) of the RTSim accelerator. As a result, the models of the LT-RTSim-II CPU (Pentium) and RTSim accelerator CPU can be run and managed simultaneously. DSP Technology also offers RTSim-ViewEX, which can generate block libraries and code for using the DI/O ports and A/D and D/A unit (DT-1021) from the SH-4A.
   

Product

Specifications

Model

DT-1020EX Lib

Simulink block library of the DT-1020

DT-5016

A/D and D/A unit

12bitA/D×8ch 2MSPS 16bitD/A×8ch 2MSPS

DT-1021

Cable

Connection to the DT-1021 (A/D and D/A unit) (1m)

DT-1023

Cable

Connection between DT-1020s when using multiple DT-1020s (10 cm)

DT-1019